Binary Adder Using More Efficient Area And Time Optimized Quantum-Dot Cellular Automata

  G.Jhansi,  Gera Indira PriyaDarshini

The area and complexity are the major issues in circuit design. The quantum-dot cellular automata (QCA) approach represents one of the possible solutions in overcoming the physical limit of reduction of transistor size to increase the computational capabilities, even though the design of logic modules in QCA is not always straightforward. The quantum dot cellular automata can implement digital circuits with faster speed, smaller size and low power consumption. Adders are the logic circuits designed to perform high speed arithmetic operations and are important components in digital systems because of their extensive use in other basic operations such as subtraction, multiplication and division. A new adder designed in QCA was presented. It achieved speed performances higher than all the existing QCA adders, with an area requirement comparable with the cheap RCA and CFA demonstrated. The novel adder operated in the RCA fashion, but it could propagate a carry signal through a number of cascaded MGs significantly lower than conventional RCA adders.

Keywords- QCA, Adder, Area, Major Gates, Efficiency

Unique Identification Number - IJEDR1704028
Page Number(s) - 181-185
Pubished in - Volume 5 | Issue 4 | October 2017
DOI (Digital Object Identifier) -   
Publisher - IJEDR (ISSN - 2321-9939)

  G.Jhansi,  Gera Indira PriyaDarshini,   "Binary Adder Using More Efficient Area And Time Optimized Quantum-Dot Cellular Automata", International Journal of Engineering Development and Research (IJEDR), ISSN:2321-9939, Volume.5, Issue 4, pp.181-185, October 2017, Available at :http://www.ijedr.org/papers/IJEDR1704028.pdf