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Paper Details
Paper Title
Dynamic Message Id Allocation And Arbitration In Can Architecture
Authors
  Keshav Verma,  Raman Jeet Singh
Abstract
On board communication on FPGA is an issue of interest for many researchers in recent years. Various protocols have been proposed in the literature to provide communication between central unit and peripherals. Control Area Network is also an on board protocol for communication of FPGA or microcontrollers with different peripherals. Traditionally, the message id allocation in CAN is static which means only one id is given to each application and it remains same throughout the communication. This leads to biasness for various applications while others always access the bus at the time of arbitration. In this paper Dynamic approach of message id allocation from the message id window is proposed which increases the randomness and thereby decreases the biasness. The results discussed in the coming sections also prove the same.
Keywords- sections also prove the same. Keywords: CAN, Bus Arbitration, Dynamic Message Scheduling
Publication Details
Unique Identification Number - IJEDR1701007Page Number(s) - 33-41Pubished in - Volume 5 | Issue 1 | January 2017DOI (Digital Object Identifier) -    Publisher - IJEDR (ISSN - 2321-9939)
Cite this Article
  Keshav Verma,  Raman Jeet Singh,   "Dynamic Message Id Allocation And Arbitration In Can Architecture", International Journal of Engineering Development and Research (IJEDR), ISSN:2321-9939, Volume.5, Issue 1, pp.33-41, January 2017, Available at :http://www.ijedr.org/papers/IJEDR1701007.pdf
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