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Paper Details
Paper Title
AMBA Bus with Multiple Masters using VLSI
Authors
  Miss. Dhage Naiyna Kashinath,  Prof. S.I. Nipanikar
Abstract
DMA is hardware feature. DMA is connected to AMBA AHB bus.
Keywords- DMA, AMBA, SOC, power state
Publication Details
Unique Identification Number - IJEDR1502019Page Number(s) - 97-102Pubished in - Volume 3 | Issue 2 | May 2015DOI (Digital Object Identifier) -    Publisher - IJEDR (ISSN - 2321-9939)
Cite this Article
  Miss. Dhage Naiyna Kashinath,  Prof. S.I. Nipanikar,   "AMBA Bus with Multiple Masters using VLSI", International Journal of Engineering Development and Research (IJEDR), ISSN:2321-9939, Volume.3, Issue 2, pp.97-102, May 2015, Available at :http://www.ijedr.org/papers/IJEDR1502019.pdf
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